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  ? semiconductor components industries, llc, 2017 march, 2018 ? rev. 3 1 publication order number: ncp110/d ncp110 linear regulator, low v in , low noise and high psrr, 200 ma the ncp110 is a linear regulator capable of supplying 200 ma output current from 1.1 v input voltage. the device provides wide output range from 0.6 v up to 4.0 v, very low noise and high psrr. due to low quiescent current the ncp110 is suitable for battery powered devices such as smartphones and tablets. the device is designed to work with a 1  f input and a 1  f output ceramic capacitor. it is available in ultra?small 0.35p, 0.65 mm x 0.65 mm chip scale package (csp) and xdfn4 0.65p, 1 mm x 1 mm. features ? operating input voltage range: 1.1 v to 5.5 v ? available in fixed voltage option: 0.6 v to 4.0 v ? 2% accuracy over load/temperature ? ultra low quiescent current typ. 20  a ? standby current: typ. 0.1  a ? very low dropout: 70 mv for 1.05 v @ 100 ma ? high psrr: typ. 95 db at 20 ma, f = 1 khz ? ultra low noise: 8.8  v rms ? stable with a 1  f small case size ceramic capacitors ? available in ?wlcsp4 0.65mm x 0.65mm x 0.33mm ? case 567vs ?xdfn4 1mm x 1mm x 0.4mm ? case 711aj ? these devices are pb?free, halogen free/bfr free and are rohs compliant typical applications ? battery?powered equipment ? smartphone, tablets ? digital cameras ? smoke detectors ? portable medical equipment ? rf, pll, vco and clock power supplies ? battery powered wireless iot modules in en gnd out off on figure 1. typical application schematics v out c out 1  f ceramic v in ncp110 c in 1  f ceramic marking diagrams www. onsemi.com x or xx = specific device code m = date code see detailed ordering, marking and shipping information on page 14 of this data sheet. ordering information pin connections xdfn4 case 711aj a1 a2 b1 b2 in out en gnd (top view) (top view) wlcsp4 case 567vs 1 xx m 1 xm
ncp110 www. onsemi.com 2 figure 2. simplified schematic block diagram in thermal shutdown mosfet driver with current limit integrated soft?start bandgap reference enable logic en out gnd en * active discharge only pin function description pin no. csp4 pin no. xdfn4 pin name description a1 4 in input voltage supply pin a2 1 out regulated output voltage. the output should be bypassed with small 1  f ceramic capacitor. b1 3 en chip enable: applying v en < 0.2 v disables the regulator, pulling v en > 0.7 v enables the ldo. b2 2 gnd common ground connection ? epad epad expose pad can be tied to ground plane for better power dissipation absolute maximum ratings rating symbol value unit input voltage (note 1) v in ?0.3 v to 6 v output voltage v out ?0.3 to v in + 0.3, max. 6 v v chip enable input v ce ?0.3 to 6 v v output short circuit duration t sc unlimited s maximum junction temperature t j 150 c storage temperature t stg ?55 to 150 c esd capability, human body model (note 2) esd hbm 2000 v esd capability, machine model (note 2) esd mm 200 v stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. 1. refer to electrical characteristics and application information for safe operating area. 2. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per eia/jesd22?a114 esd machine model tested per eia/jesd22?a115 latchup current maximum rating tested per jedec standard: jesd78. thermal characteristics rating symbol value unit thermal characteristics, csp4 (note 3) thermal resistance, junction?to?air r  ja 108 c/w thermal characteristics, xdfn4 (note 3) thermal resistance, junction?to?air 208 3. measured according to jedec board specification. detailed description of the board can be found in jesd51?7
ncp110 www. onsemi.com 3 electrical characteristics ?40 c t j 125 c; v in = v out(nom) + 0.3 v or 1.1 v, whichever is greater; i out = 1 ma, c in = c out = 1  f, unless otherwise noted. v en = 1.0 v. typical values are at t j = +25 c (note 4). parameter test conditions symbol min typ max unit operating input voltage v in 1.1 5.5 v output voltage accuracy v in = v out(nom) + 0.3 v (v in 1.1 v) v out(nom) 1.5 v v out ?30 +30 mv v out(nom) > 1.5 v ?2 +2 % line regulation v out(nom) + 0.5 v v in 5.5 v, (v in 1.1 v) line reg 0.02 %/v load regulation i out = 1 ma to 200 ma load reg 0.001 %/ma dropout voltage (note 5) v out(nom) = 1.05 v i out = 50 ma v do 40 70 mv i out = 100 ma 70 130 v out(nom) = 1.20 v i out = 110 ma 60 140 i out = 200 ma 110 190 v out(nom) = 1.80 v i out = 200 ma 65 120 v out(nom) = 2.80 v i out = 200 ma 45 100 output current limit v out = 90% v out(nom) i cl 225 300 ma short circuit current v out = 0 v i sc 300 quiescent current i out = 0 ma i q 20 25  a shutdown current v en 0.2 v, v in = 1.1 v i dis 0.01 1.0  a en pin threshold voltage en input voltage ?h? v enh 0.7 v en input voltage ?l? v enl 0.2 en pull down current v en = 1.1 v i en 0.2 0.5  a turn?on time c out = 1  f, from assertion of v en to v out = 95% v out(nom) t on 120  s power supply rejection ratio i out = 20 ma, v in = v out + 0.3 v f = 100 hz f = 1 khz f = 10 khz f = 100 khz psrr 90 95 85 55 db output voltage noise f = 10 hz to 100 khz v n 8.8  v rms thermal shutdown threshold temperature rising t sdh 160 c temperature falling t sdl 140 c active output discharge resis- tance v en < 0.2 v, version a only r dis 280  product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 4. performance guar anteed over the indicated operating temperature range by design and/or characterization. production tested at t a = 25 c. low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possibl e. 5. dropout voltage is characterized when v out falls 0.02 x v out(nom) below v out(nom) . 6. guaranteed by design.
ncp110 www. onsemi.com 4 typical characteristics 1.06 1.055 1.05 1.045 1.04 1.035 1.03 v out , output voltage (v) t j , temperature ( c) ?40 140 0 20 40 60 120 100 figure 3. output voltage vs. temperature ? v out,nom = 1.05 v ? csp4 i out = 1 ma i out = 200 ma 1.205 v out , output voltage (v) t j , temperature ( c) figure 4. output voltage vs. temperature ? v out,nom = 1.2 v ? csp4 i out = 1 ma i out = 200 ma 1.2 1.195 1.19 1.185 1.8 ?20 80 ?40 140 0 20 40 60 120 100 ?20 80 1.81 v out , output voltage (v) t j , temperature ( c) figure 5. output voltage vs. temperature ? v out,nom = 1.8 v ? csp4 i out = 1 ma i out = 200 ma 1.805 1.8 1.795 1.79 1.785 1.78 1 load reg , load regulation (mv) t j , temperature ( c) figure 6. load regulation vs. temperature 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 v in = v out,nom + 0.3 v i out = 1 ma to 200 ma ?40 140 0 20 40 60 120 100 ?20 80 ?40 140 0 20 40 60 120 100 ?20 80 0 0.05 0.1 0.15 0.2 0.25 0.3 ?40 ?20 0 20 40 60 80 100 120 140 line reg , line regulation (mv/v) t j , temperature ( c) figure 7. line regulation vs. temperature 1000 i gnd , ground current (  a) i out , output current (a) 1u figure 8. ground current vs. output current ? v out,nom = 1.2 v 10u 100u 1m 10m 100m 1 100 10 t j = 25 c t j =?40 c t j = 125 c
ncp110 www. onsemi.com 5 typical characteristics 160 v drop , dropout voltage (mv) i out , output current (ma) 0 figure 9. dropout voltage vs. output current ? v out ,nom = 1.2 v ? csp4 package 40 80 180 120 160 200 140 120 100 80 60 40 20 0 20 60 100 140 t j = 25 c t j =?40 c t j = 125 c 160 v drop , dropout voltage (mv) t j , temperature ( c) 0 figure 10. dropout voltage vs. temperature ? v out ,nom = 1.05 v ? csp4 package 40 80 120 140 120 100 80 60 40 20 0 20 60 100 140 ?20 ?40 180 200 i out = 200 ma i out = 10 ma i out = 100 ma 160 v drop , dropout voltage (mv) t j , temperature ( c) figure 11. dropout voltage vs. temperature ? v out ,nom = 1.2 v ? csp4 package 140 120 100 80 60 40 20 0 i out = 200 ma i out = 10 ma i out = 100 ma 0 40 80 120 20 60 100 140 ?20 ?40 v drop , dropout voltage (mv) t j , temperature ( c) figure 12. dropout voltage vs. temperature ? v out ,nom = 1.8 v ? csp4 package 100 80 60 40 20 0 0 40 80 120 20 60 100 140 ?20 ?40 i out = 200 ma i out = 10 ma i out = 100 ma i cl , current limit, i sc , short circuit current (a) t j , temperature ( c) figure 13. short?circuit current vs. temperature 400 0 40 80 120 20 60 100 140 ?20 ?40 390 380 370 360 350 340 330 320 310 300 i cl i sc v in = 1.5 v v out,nom = 1.2 v c in = c out = 1  f i cl : v out = 90% v out,nom i sc : v out = 0 v (short) v en,th,on , v en,th,off , enable threshold voltage (mv) t j , temperature ( c) figure 14. enable thresholds voltage vs. temperature 600 0 40 80 120 20 60 100 140 ?20 ?40 off ?> on on ?> off 500 400 300 200 100 0
ncp110 www. onsemi.com 6 i en , enable pin current (ma) t j , temperature ( c) figure 15. enable pin current vs. temperature 0.3 0 40 80 120 20 60 100 140 ?20 ?40 0.25 0.2 0.15 0.1 0.05 0 v en = 1 v i dis , disable current (na) t j , temperature ( c) figure 16. disable current vs. temperature 160 0 40 80 120 20 60 100 140 ?20 ?40 v en = 0 v 140 120 100 80 60 40 20 0 r dis , discharge resistivity (  ) t j , temperature ( c) figure 17. discharge resistivity vs. temperature 300 0 40 80 120 20 60 100 140 ?20 ?40 290 280 270 260 250 240 230 220 210 200 v in = 1.5 v v out,nom = 1.2 v esr, equivalent series resistance (  ) i out , output current (ma) figure 18. maximum c out esr value vs. output current 100 0 40 80 120 20 60 100 140 v out,nom = 1.2 v c out = 1  f unstable region stable region 10 1 0.1 0.01 160 180 200
ncp110 www. onsemi.com 7 i out (ma) rms output noise (  v) 10 hz ? 100 khz 100 hz ? 100 khz 2 10.01 8.79 20 8.78 7.39 200 8.77 7.44 i out = 2 ma i out = 20 ma i out = 200 ma spectral noise density (  v/ hz ) f, frequency (hz) figure 19. output voltage spectral noise density vs. frequency 10 10 1 0.1 0.01 0.001 100 1k 10k 100k 1m v in = 1.5 v v out,nom = 1.2 v c in = c out = 1  f i out (ma) rms output noise (  v) 10 hz ? 100 khz 100 hz ? 100 khz i out = 2 ma i out = 20 ma i out = 200 ma spectral noise density (  v/ hz ) f, frequency (hz) figure 20. output voltage spectral noise density vs. frequency 10 1 0.1 0.01 0.001 v in = 1.35 v v out,nom = 1.05 v c in = c out = 1  f 2 20 200 10.01 8.78 8.77 8.79 7.39 7.44 10 100 1k 10k 100k 1m i out (ma) rms output noise (  v) 10 hz ? 100 khz 100 hz ? 100 khz i out = 2 ma i out = 20 ma i out = 200 ma spectral noise density (  v/ hz ) f, frequency (hz) figure 21. output voltage spectral noise density vs. frequency 10 1 0.1 0.01 0.001 v in = 2.1 v v out,nom = 1.8 v c in = c out = 1  f 2 20 200 9.88 9.01 9.08 8.71 7.73 7.70 10 100 1k 10k 100k 1m
ncp110 www. onsemi.com 8 typical characteristics psrr, power supply rejection ratio (db) f, frequency (hz) figure 22. psrr vs. frequency 10 120 100 1k 10k 100k 1m 10m 100 80 60 40 20 0 i out = 2 ma i out = 20 ma i out = 200 ma v in = 1.35 v + 100 mvpp v out,nom = 1.05 v c out = 1  f psrr, power supply rejection ratio (db) f, frequency (hz) figure 23. psrr vs. frequency 120 100 80 60 40 20 0 i out = 2 ma i out = 20 ma i out = 200 ma v in = 1.5 v + 100 mvpp v out,nom = 1.2 v c out = 1  f 10 100 1k 10k 100k 1m 10m psrr, power supply rejection ratio (db) f, frequency (hz) figure 24. psrr vs. frequency 120 100 80 60 40 20 0 i out = 2 ma i out = 20 ma i out = 200 ma v in = 2.1 v + 100 mvpp v out,nom = 1.8 v c out = 1  f 10 100 1k 10k 100k 1m 10m
ncp110 www. onsemi.com 9 typical characteristics v en i in v out v in = 1.5 v v out,nom = 1.2 v i out = 10 ma c in = 1  f c out = 4.7  f figure 25. enable turn?on response, c out = 1  f, i out = 10 ma v en i in v out v in = 1.5 v v out,nom = 1.2 v i out = 10 ma c in = c out = 1  f figure 26. enable turn?on response, c out = 4.7  f, i out = 10 ma 1 v/div 100 ma/div 400 mv/div 1 v/div 100 ma/div 400 mv/div 20  s/div 20  s/div v in = 1.5 v v out,nom = 1.2 v i out = 200 ma c in = c out = 1  f v en i in v out figure 27. enable turn?on response, c out = 1  f, i out = 200 ma figure 28. enable turn?on response, c out = 4.7  f, i out = 200 ma v en i in v out v in = 1.5 v v out,nom = 1.2 v i out = 200 ma c in = 1  f c out = 4.7  f 1 v/div 100 ma/div 400 mv/div 1 v/div 100 ma/div 400 mv/div 20  s/div 20  s/div v out v in 1.5 v 2.5 v t rise = 1  s t fall = 1  s v out,nom = 1.2 v i out = 10 ma c out = 1  f figure 29. line transient response, i out = 10 ma figure 30. line transient response, i out = 200 ma v in t rise = 1  s v out,nom = 1.2 v i out = 200 ma c out = 1  f v out 1.5 v 2.5 v t fall = 1  s 500 mv/div 10 mv/div 500 mv/div 10 mv/div 4  s/div 4  s/div
ncp110 www. onsemi.com 10 typical characteristics v out i out t rise = 1  s 1 ma 200 ma v in = 1.5 v v out,nom = 1.2 v c out = 1  f c out = 4.7  f figure 31. load transient response, i out = 1 ma to 200 ma figure 32. load transient response, i out = 1 ma to 200 ma v out i out t fall = 1  s 1 ma 200 ma v in = 1.5 v v out,nom = 1.2 v c out = 1  f c out = 4.7  f 20 mv/div 100 ma/div 100 ma/div 20 mv/div 1  s/div 10  s/div t rise = 500 ns t rise = 1  s 200 ma i out 1 ma v out v in = 1.5 v v out,nom = 1.2 v c out = 1  f figure 33. load transient response, i out = 1 ma to 200 ma figure 34. load transient response, i out = 1 ma to 200 ma t rise = 500 ns t rise = 1  s 200 ma i out 1 ma v in = 1.5 v v out,nom = 1.2 v c out = 1  f v out 20 mv/div 100 ma/div 20 mv/div 100 ma/div 1  s/div 4  s/div figure 35. overheating protection ? tsd i out v out v in = 5.5 v v out,nom = 1.2 v i out = 200 ma c in = 1  f c out = 1  f figure 36. turn on/off, slow rising v in v in v out v in = 0 v to 1.5 v v out,nom = 1.2 v i out = 10 ma c in = c out = 1  f 1.5 v 0 v 400 mv/div 50 ma/div 400 mv/div 100 ms/div 2 ms/div
ncp110 www. onsemi.com 11 typical characteristics figure 37. enable turn?off response, various output capacitors v en v in = 1.5 v v out,nom = 1.2 v i out = 200 ma c in = c out = 1  f c out = 1  f c out = 4.7  f c out = 10  f v out 1 v/div 400 mv/div 40  s/div
ncp110 www. onsemi.com 12 applications information general the ncp110 is an ultra?low input voltage, ultra?low noise 200 ma low dropout regulator designed to meet the requirements of low voltage rf applications and high performance analog circuits. the ncp110 device provides very high psrr and excellent dynamic response. in connection with low quiescent current this device is well suitable for battery powered application such as cell phones, tablets and other. the ncp110 is fully protected in case of current overload, output short circuit and overheating. input capacitor selection (c in ) input capacitor connected as close as possible is necessary for ensure device stability. the x7r or x5r capacitor should be used for reliable performance over temperature range. the value of the input capacitor should be 1  f or greater to ensure the best dynamic performance. this capacitor will provide a low impedance path for unwanted ac signals or noise modulated onto constant input voltage. there is no requirement for the esr of the input capacitor but it is recommended to use ceramic capacitors for their low esr and esl. a good input capacitor will limit the influence of input trace inductance and source resistance during sudden load current changes. output decoupling the ncp110 requires an output capacitor connected as close as possible to the output pin of the regulator. the recommended capacitor value is 1  f and x7r or x5r dielectric due to its low capacitance variations over the specified temperature range. the ncp110 is designed to remain stable with minimum effective capacitance of 0.6  f to account for changes with temperature, dc bias and package size. especially for small package size capacitors such as 0201 the ef fective capacitance drops rapidly with the applied dc bias. please refer to figure 38. figure 38. capacity vs dc bias voltage there is no requirement for the minimum value of equivalent series resistance (esr) for the c out but the maximum value of esr should be less than 1.6  . larger output capacitors and lower esr could improve the load transient response or high frequency psrr. it is not recommended to use tantalum capacitors on the output due to their large esr. the equivalent series resistance of tantalum capacitors is also strongly dependent on the temperature, increasing at low temperature. enable operation the ncp110 uses the en pin to enable/disable its device and to deactivate/activate the active discharge function. if the en pin voltage is <0.2 v the device is guaranteed to be disabled. the pass transistor is turned?off so that there is virtually no current flow between the in and out. the active discharge transistor is active so that the output voltage v out is pulled to gnd through a 280  resistor. in the disable state the device consumes as low as typ. 10 na from the v in . if the en pin voltage >0.7 v the device is guaranteed to be enabled. the ncp110 regulates the output voltage and the active discharge transistor is turned?off. the en pin has internal pull?down current source with typ. value of 200 na which assures that the device is turned?off when the en pin is not connected. in the case where the en function isn?t required the en should be tied directly to in. output current limit output current is internally limited within the ic to a typical 350 ma. the ncp110 will source this amount of current measured with a voltage drops on the 90% of the nominal v out . if the output voltage is directly shorted to ground (v out = 0 v), the short circuit protection will limit the output current to 360 ma (typ). the current limit and short circuit protection will work properly over whole temperature range and also input voltage range. there is no limitation for the short circuit duration. thermal shutdown when the die temperature exceeds the thermal shutdown threshold (tsd ? 160 c typical), thermal shutdown event is detected and the device is disabled. the ic will remain in this state until the die temperature decreases below the thermal shutdown reset threshold (tsdu ? 140 c typical). once the ic temperature falls below the 140 c the ldo is enabled again. the thermal shutdown feature provides the protection from a catastrophic device failure due to accidental overheating. this protection is not intended to be used as a substitute for proper heat sinking. power dissipation as power dissipated in the ncp110 increases, it might become necessary to provide some thermal relief. the maximum power dissipation supported by the device is dependent upon board design and layout. mounting pad configuration on the pcb, the board material, and the ambient temperature af fect the rate of junction temperature
ncp110 www. onsemi.com 13 rise for the part. the maximum power dissipation the ncp110 can handle is given by: p d(max)   125 o c  t a   ja (eq. 1) the power dissipated by the ncp110 for given application conditions can be calculated from the following equations: p d  v in  i gnd  i out v in  v out
(eq. 2) 0.40 0.60 0.80 1.00 1.20 1.40 1.60 80 90 100 110 120 130 140 0 100 200 300 400 500 600 700 figure 39.  ja and p d (max) vs. copper area (csp4) pcb copper area (mm 2 )  ja , junction to ambient thermal resistance ( c/w) p d(max) , maximum power dissipation (w)  ja , 2 oz cu  ja , 1 oz cu p d(max) , t a = 25 c, 1 oz cu p d(max) , t a = 25 c, 2 oz cu 0.4 0.45 0.5 0.55 0.6 0.65 0.7 170 180 190 200 210 220 230 0 100 200 300 400 500 600 700 figure 40.  ja and p d (max) vs. copper area (xdfn4) pcb copper area (mm 2 )  ja , junction to ambient thermal resistance ( c/w) p d(max) , maximum power dissipation (w)  ja , 2 oz cu  ja , 1 oz cu p d(max) , t a = 25 c, 1 oz cu p d(max) , t a = 25 c, 2 oz cu
ncp110 www. onsemi.com 14 ordering information device nominal output voltage marking rotation description package shipping ? ncp110afct060t2g 0.60 v c 0 200 ma, active discharge wlcsp4 case 567vs (pb-free) 5000 / tape & reel ncp110afct080t2g 0.80 v j 0 ncp110afct085t2g 0.85 v 2 0 ncp110afct105t2g 1.05 v a 0 ncp110afct110t2g 1.10 v g 0 ncp110afct120t2g 1.20 v f 0 ncp110afct180t2g 1.80 v d 0 ncp110afct280t2g 2.80 v e 0 ordering information device nominal output voltage marking description package shipping ncp110amx060tbg 0.60 v fc 200 ma, active discharge xdfn4 case 711aj (pb-free) 3000 / tape & reel ncp110amx075tbg 0.75 v f3 ncp110amx080tbg 0.80 v fj ncp110amx085tbg 0.85 v f2 ncp110amx105tbg 1.05 v fa ncp110amx110tbg 1.10 v fh NCP110AMX120TBG 1.20 v ff ncp110amx180tbg 1.80 v fd ncp110amx280tbg 2.80 v fe ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ncp110 www. onsemi.com 15 package dimensions wlcsp4, 0.64x0.64x0.33 case 567vs issue o seating plane notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. coplanarity applies to spherical crowns of solder balls. dim a min nom ??? millimeters a1 d e b 0.180 0.200 e 0.35 bsc ??? e d a b pin a1 reference e a 0.03 b c 0.05 c 4x b 12 b a 0.05 c a a1 a2 c 0.04 0.06 top view side view bottom view note 3 e a2 0.23 ref pitch 0.20 4x dimensions: millimeters *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.35 0.35 recommended a1 package outline pitch max 0.610 0.640 0.610 0.640 0.220 0.33 0.08 0.670 0.670
ncp110 www. onsemi.com 16 package dimensions xdfn4 1.0x1.0, 0.65p case 711aj issue a notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.20 mm from the terminal tips. 4. coplanarity applies to the exposed pad as well as the terminals. a b e d d2 bottom view b e 4x note 3 2x 0.05 c pin one reference top view 2x 0.05 c a a1 (a3) 0.05 c 0.05 c c seating plane side view l 4x 1 2 dim min max millimeters a 0.33 0.43 a1 0.00 0.05 a3 0.10 ref b 0.15 0.25 d 1.00 bsc d2 0.43 0.53 e 1.00 bsc e 0.65 bsc l 0.20 0.30 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. mounting footprint* 1.20 0.26 0.24 4x dimensions: millimeters 0.39 recommended package outline note 4 e/2 d2 45  a m 0.05 b c 4 3 0.65 pitch detail a 4x b2 0.02 0.12 l2 0.07 0.17 4x 0.52 2x 0.11 4x l2 4x detail a b2 4x on semiconductor and are trademarks of semiconductor components industries, llc dba on semiconductor or its subsidiaries i n the united states and/or other countries. on semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . a listing of on semiconductor?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does o n semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. buyer is responsible for its products and applications using on semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by on semiconductor. ?typical? parameters which may be provided in on semiconductor data sheets and/or specifications can and do vary in dif ferent applications and actual performance may vary over time. all operating parameters, including ?typic als? must be validated for each customer application by customer?s technical experts. on semiconductor does not convey any license under its patent rights nor the right s of others. on semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any fda class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. should buyer purchase or use on semicondu ctor products for any such unintended or unauthorized application, buyer shall indemnify and hold on semiconductor and its officers, employees, subsidiaries, affiliates, and distrib utors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that on semiconductor was negligent regarding the design or manufacture of the part. on semiconductor is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 ncp110/d literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative ?


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